YugabyteDB (2.13.1.0-b60, 21121d69985fbf76aa6958d8f04a9bfa936293b5)

// Copyright (c) 2012 The Chromium Authors. All rights reserved.

// Use of this source code is governed by a BSD-style license that can be

// found in the LICENSE file.

//

// The following only applies to changes made to this file as part of YugaByte development.

//

// Portions Copyright (c) YugaByte, Inc.

//

// Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except

// in compliance with the License.  You may obtain a copy of the License at

//

// http://www.apache.org/licenses/LICENSE-2.0

//

// Unless required by applicable law or agreed to in writing, software distributed under the License

// is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express

// or implied.  See the License for the specific language governing permissions and limitations

// under the License.

//

#ifndef BASE_CPU_H_

#define BASE_CPU_H_

#include <string>

namespace base {

// Query information about the processor.

class CPU {

 public:

  // Constructor

  CPU();

  enum IntelMicroArchitecture {

    PENTIUM,

    SSE,

    SSE2,

    SSE3,

    SSSE3,

    SSE41,

    SSE42,

    AVX,

    AVX2,

    MAX_INTEL_MICRO_ARCHITECTURE

  };

  // Accessors for CPU information.

  const std::string& vendor_name() const { return cpu_vendor_; }

  int signature() const { return signature_; }

  int stepping() const { return stepping_; }

  int model() const { return model_; }

  int family() const { return family_; }

  int type() const { return type_; }

  int extended_model() const { return ext_model_; }

  int extended_family() const { return ext_family_; }

  bool has_mmx() const { return has_mmx_; }

  bool has_sse() const { return has_sse_; }

  bool has_sse2() const { return has_sse2_; }

  bool has_sse3() const { return has_sse3_; }

  bool has_ssse3() const { return has_ssse3_; }

  bool has_sse41() const { return has_sse41_; }

  bool has_sse42() const { return has_sse42_; }

  bool has_avx() const { return has_avx_; }

  bool has_avx2() const { return has_avx2_; }

  bool has_aesni() const { return has_aesni_; }

  bool has_non_stop_time_stamp_counter() const {

    return has_non_stop_time_stamp_counter_;

  }

  // has_broken_neon is only valid on ARM chips. If true, it indicates that we

  // believe that the NEON unit on the current CPU is flawed and cannot execute

  // some code. See https://code.google.com/p/chromium/issues/detail?id=341598

  bool has_broken_neon() const { return has_broken_neon_; }

  IntelMicroArchitecture GetIntelMicroArchitecture() const;

  const std::string& cpu_brand() const { return cpu_brand_; }

 private:

  // Query the processor for CPUID information.

  void Initialize();

  int signature_;  // raw form of type, family, model, and stepping

  int type_;  // process type

  int family_;  // family of the processor

  int model_;  // model of processor

  int stepping_;  // processor revision number

  int ext_model_;

  int ext_family_;

  bool has_mmx_;

  bool has_sse_;

  bool has_sse2_;

  bool has_sse3_;

  bool has_ssse3_;

  bool has_sse41_;

  bool has_sse42_;

  bool has_avx_;

  bool has_avx2_;

  bool has_aesni_;

  bool has_non_stop_time_stamp_counter_;

  bool has_broken_neon_;

  std::string cpu_vendor_;

  std::string cpu_brand_;

};

}  // namespace base

#endif  // BASE_CPU_H_